ds05-20838-1e fujitsu semiconductor data sheet flash memory cmos 2 m (256 k 8/128 k 16) bit mbm29f200ta -90-x/-12-x /MBM29F200BA -90-x/-12-x n features single 5.0 v read, program, and erase minimizes system level power requirements compatible with jedec-standard commands uses same software commands as e 2 proms compatible with jedec-standard world-wide pinouts 44-pin sop (package suf?: pf) 48-pin tsop (i) (package suf?: pftn ?normal bend type, pftr ?reversed bend type) minimum 100,000 write/erase cycles high performance 90 ns maximum access time sector erase architecture one 16k byte, two 8k bytes, one 32k byte, and three 64k bytes. any combination of sectors can be concurrently erased. also supports full chip erase. boot code sector architecture ta = top sector ba = bottom sector embedded erase tm algorithms automatically pre-programs and erases the chip or any sector embedded program tm algorithms automatically write and veri?s data at speci?d address data polling and toggle bit feature for detection of program or erase cycle completion ready/busy output (ry/by ) hardware method for detection of program of erase cycle completion. ?ow v cc write inhibit 3.2 v hardware reset pin resets internal state machine to the read mode. sector protection hardware method disables any combination of sectors from write or erase operations temporary sector groups unprotection hardware method temporarily enable any combination of sectors from write or erase operations (continued) embedded erase tm and embedded program tm are trademarks of advanced micro devices, inc.
2 mbm29f200ta -90-x/-12-x /MBM29F200BA -90-x/-12-x (continued) erase suspend/resume suspends the erase operation to allow a read data in another sector within the same device extended operating temperature range: ?0 c to +85 c n package please refer to ?bm29f200ta/MBM29F200BA |